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First of all, thank you for your help.

I'm reviewing quadrature encoder specifications.

As i know, line receiver specification is 10MHz.

So, when I use quadrature encoder of 0.1 micrometer per pulse, I can use 4m/s at max speed.

Is that correct?

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I'm not sure exactly what you mean by 0.1um per pulse. If you mean 0.1um between the closest A & B edges, which creates a "count" with times-4 decode, then yes, your max speed will be 4m/s. (If you look at the A and B waveforms in this case, each "pulse" on each signal will be 0.4um. This is why you have to be careful with your terminology.

Make sure you set Gate3[i].EncClockDiv to 0 to select 100 MHz digital sampling of the signals.

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01-05-2020, 06:44 PM
(This post was last modified: 01-05-2020, 06:53 PM by hjpark.)
Thank you for reply.

"0.1um per pulse" means "0.025um per count", when Gate3[i].Chan[j].Encctrl is set 3 or 7

To ask again, how do you calculate max speed of quadrature encoder with ACC-24E3?

Is it related to Gate3[i].EncClockDiv? or line reciever's maximum operating frequency?

If it is related to line reciever, what is the maximum operating frequency?

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There are two limits in the circuitry here. If either is past, you could lose counts.

The first limit is the "analog" frequency limit of the differential receivers. The suppliers will not guarantee proper operation past 10 MHz signal (pulse) frequency, which corresponds to a 40 MHz quadrature count (edge) rate.

This is a "soft" limit -- a given receiver will probably work at 11 or 12 MHz signal frequency because there is some safety margin built in to the specification, but operation cannot be guaranteed. What may work on one card will not work on another, given part-to-part variation.

The second limit is the digital sampling limit by the DSPGATE3 ASIC of the output of the line receivers. In one sampling period, there can only be a transition on one of the A and B inputs for the decoding logic to work. If there is ever a sampling period that sees both A and B change, you get an unrecoverable "count error". (A status bit is set for the channel if this happens.)

Even with a perfect quadrature input signals, the sampling frequency must be 4 times the maximum signal frequency in order to see all 4 edges in separate sample periods. Because no signals are ever perfect, we recommend a minimum of 5 times higher.

So for your system, you are limited by the 10 MHz receiver limit, which corresponds to 1 m/sec. In order for the ASIC to be able to decode the signals at this frequency, you must use either the 50 MHz or 100 MHz encoder sampling frequency.

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01-06-2020, 10:03 PM
(This post was last modified: 01-06-2020, 10:04 PM by hjpark.)
Thanks very much.

The question is completely solved.