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GateIO address detection
#1
The IO Gate addresses detected don't reflect the dip switch setting done on the different IO boards, but the memory map to access th IO is correct.


e.g.
setting of our dip switches
ACC66E first | $B00000 | Gate IO 4 |
ACC66E second | $B08000 | Gate IO 5 |

The 1st ACC66E is responding on $B00000 but is detected in the sys.CardIOAutoDetect in a wrong bit and the intellisense GateIO[1] instead of GateIO[4].
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#2
DT-Europe Wrote:The IO Gate addresses detected don't reflect the dip switch setting done on the different IO boards, but the memory map to access th IO is correct.


e.g.
setting of our dip switches
ACC66E first | $B00000 | Gate IO 4 |
ACC66E second | $B08000 | Gate IO 5 |

The 1st ACC66E is responding on $B00000 but is detected in the sys.CardIOAutoDetect in a wrong bit and the intellisense GateIO[1] instead of GateIO[4].


The attached document contains the proper indexes.


Attached Files
.doc   Power PMAC IO Card Offsets.doc (Size: 52.5 KB / Downloads: 32)
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#3
(09-16-2008, 08:27 AM)brad Wrote: The attached document contains the proper indexes.

Just being stupid: This document is for all I/O boards? (I'm using the ACC-24E2A)
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